# JET-ARCHER-1 · PCBWay Fab Spec Sheet
Rev 1.0 · 2026-05-23

Hand this to PCBWay's quote tool (pcbway.com/orderonline.aspx) or attach as a
note when submitting Gerbers. Fields match the PCBWay online order form.

---

## Board specification

| Field | Value |
|---|---|
| **Quantity** | 5 (proto run), 100 (production) |
| **Material** | FR-4 standard TG ≥ 170 °C |
| **Board type** | Rigid |
| **Layers** | **4** |
| **Dimensions** | 74.0 mm × 46.0 mm |
| **Different design in panel** | 1 |
| **Board thickness** | 1.6 mm |
| **Min track / space** | 5 mil / 5 mil (0.127 mm / 0.127 mm) |
| **Min hole size** | 0.3 mm |
| **Solder mask** | Black, both sides |
| **Silkscreen** | White, both sides |
| **Surface finish** | **ENIG (RoHS)** |
| **Edge connector** | No |
| **Edge plating** | No |
| **Castellated holes** | No |
| **Half-cut / Plated half-holes** | No |
| **Impedance control** | **YES — 100 Ω diff (CSI-2), 90 Ω diff (USB3), 85 Ω diff (PCIe)** |
| **Copper weight (inner)** | 1 oz (35 µm) |
| **Copper weight (outer)** | 1 oz (35 µm) |
| **Via process** | Tenting (default) |
| **Via-in-pad** | **YES — required for SOM BGA-equivalent escape under socket** |
| **Finished hole copper** | ≥ 25 µm |
| **Material certification** | Standard (UL marking OK) |
| **Test method** | **Flying probe, 100% e-test** |
| **HDI / blind/buried vias** | No (4-layer standard) |
| **Country of origin marking** | Yes |

## Layer stackup

| Layer | Description | Copper | Dielectric below |
|---|---|---|---|
| L1 | Top signal + components | 1 oz | 0.20 mm prepreg (7628 + 1080) |
| L2 | GND plane (unbroken reference) | 1 oz | 0.80 mm core |
| L3 | Power plane (split: +5V / +3V3 / VBAT_PROT) | 1 oz | 0.20 mm prepreg (7628 + 1080) |
| L4 | Bottom signal + CSI lanes | 1 oz | — |

Total finished thickness: 1.60 mm ± 10%
Dielectric constant target: εr ≈ 4.4 @ 1 GHz

## PCBWay equivalent stackup code

When submitting, request **PCBWay JLC04161H-3313 equivalent** or call out the
above stackup explicitly in the order notes. PCBWay's "4-layer 1.6 mm
controlled impedance" default matches within tolerance.

---

## Assembly specification (PCBWay PCBA service)

| Field | Value |
|---|---|
| **Assembly side** | **Both sides (SMT top + bottom)** |
| **Through-hole assembly** | Yes (XT60 J1, mounting hardware) |
| **Number of unique parts** | ~28 |
| **Number of SMT pads** | ~640 |
| **BGA / QFN / leadless** | Yes (TPS25985 QFN-12, TPS548A20 VQFN-16) |
| **Fine pitch parts** | JAE MM70 SO-DIMM 0.5 mm pitch — verify capability |
| **Tightest pitch** | 0.5 mm (SO-DIMM connector) |
| **Functional test** | Power-on test against attached spec |
| **Conformal coating** | None (drone use; consider acrylic spray for prod) |

## Files to upload to PCBWay

1. **Gerbers (RS-274X)** — `JET-ARCHER-1-Gerbers.zip`
   - Top.gbr, Bottom.gbr, In1_Cu.gbr, In2_Cu.gbr
   - Top.gto, Bottom.gbo (silkscreen)
   - Top.gts, Bottom.gbs (mask)
   - Edge_Cuts.gm1 (outline)
   - PTH.drl, NPTH.drl (Excellon drill)
2. **BOM** — `JET-ARCHER-1-BOM.csv` (see this package)
3. **Pick & Place / CPL** — `JET-ARCHER-1-CPL.csv` (see this package)
4. **3D STEP** (optional but recommended) — `JET-ARCHER-1.step`
5. **README** — submission notes (see `README.md`)

## Lead times (PCBWay, May 2026)

| Service | Lead time | Notes |
|---|---|---|
| Bare PCB (5×, 4-layer, ENIG, impedance control) | 5–7 days | Standard tier |
| Bare PCB + Assembly | 12–18 days | PCBWay parts library coverage ≈ 85% of our BOM |
| Bare PCB + Assembly with consigned NVIDIA SOM | 18–25 days | Ship SOM separately; install on receipt |

## Cost estimates (May 2026, PCBWay catalog)

| Quantity | Bare PCB only | With assembly (no SOM) | Per-unit assembled cost |
|---|---|---|---|
| 5 | ~$120 | ~$480 | ~$96 |
| 25 | ~$250 | ~$1,400 | ~$56 |
| 100 | ~$520 | ~$3,600 | ~$36 |

Plus the SOM ($249 single, $199 at 100) and external NVMe ($32) sourced
separately, since PCBWay's parts library doesn't carry the Jetson SOM.

---

## Critical fab notes — read before submitting

1. **Impedance control is mandatory.** Without it, PCIe Gen3 to NVMe will not
   link up reliably and the build is dead. Explicitly call out 100 Ω diff /
   90 Ω diff / 85 Ω diff in the order notes and request impedance test coupon.

2. **Via-in-pad required under SO-DIMM socket.** The 0.5 mm pitch needs
   filled+capped via-in-pad to escape the BGA-equivalent pin array. PCBWay
   offers this as a chargeable option (~$50 setup fee).

3. **DO NOT downgrade surface finish.** ENIG is required for the SO-DIMM
   contact wear life. HASL will wear out after ~50 SOM swaps.

4. **Drill tolerances on the M2.5 mounting holes (4 corners) — non-plated.**
   Verify Edge_Cuts and NPTH drill files mark them as NPTH, not PTH.

5. **Order an extra board.** Always order 5 minimum, ship to a single
   destination. PCBWay's per-board price is dominated by setup; the marginal
   cost of unit 5 is ~$10.

6. **Request a fab visual proof** before they run. PCBWay sends a render —
   inspect for solder mask coverage over the SO-DIMM contact area (must NOT
   cover the contact fingers; the socket sits on the pads, mask only on the
   gaps).